1. Field
Exemplary embodiments of the present invention relate to a semiconductor device, and more particularly, to a technology for transferring data stored in a non-volatile memory device of a semiconductor device to other constituent elements of the semiconductor device.
2. Description of the Related Art
FIG. 1 is a block diagram illustrating a repair operation of a conventional memory device.
Referring to FIG. 1, the memory device includes a cell array 110, a row circuit 120, and a column circuit 130. The cell array 110 includes a plurality of memory cells. The row circuit 120 enables a word line that is selected based on a row address R_ADD. The column circuit 130 accesses, for example, ‘reads’ or ‘writes’, a data of a bit line that is selected based on a column address C_ADD.
A row fuse circuit 140 stores a row address corresponding to a failure memory cell of the cell array 110 by a repair row address REPAIR_R_ADD. A row comparison unit 150 compares the repair row address REPAIR_R_ADD stored in the row fuse circuit 140 with the row address R_ADD inputted from the outside of the memory device. If the repair row address REPAIR_R_ADD and the row address R_ADD are the same, the row comparison unit 150 controls the row circuit 120 to enable a redundancy word line instead of the word line designated by the row address R_ADD.
A column fuse circuit 160 stores a column address corresponding to a failure memory cell of the cell array 110 by a repair column address REPAIR_C_ADD. A column comparison unit 170 compares the repair column address REPAIR_C_ADD stored in the column fuse circuit 160 with the column address C_ADD inputted from the outside of the memory device. If the repair column address REPAIR_C_ADD and the column address C_ADD are the same, the column comparison unit 170 controls the column circuit 130 to enable a redundancy bit line instead of the bit line designated by the column address C_ADD.
The row fuse circuit 140 and the column fuse circuit 160 shown in FIG. 1 use a laser fuse. The laser fuse stores a data of a logic high level or a logic low level according to whether the fuse is cut or not. The laser fuse may be programmed in the stage of forming wafer, but after the wafer is mounted on a package, the laser fuse cannot be programmed. Also, the laser fuse may not be designed to be small due to technical limitation of pitch. To address such a feature, an e-fuse may be used, where the e-fuse may be formed of a transistor or a capacitor resistor. When the e-fuse is formed of a transistor, the e-fuse stores a data by changing the resistance between a gate and a drain/source.
FIG. 2 a schematic diagram illustrating an e-fuse formed of a transistor operating as a resistor or a capacitor.
Referring to FIG. 2, the e-fuse is formed of a transistor T, and when a power source voltage of an ordinary level that the transistor T may endure is applied to a gate G, the e-fuse operates as a capacitor C. Therefore, no current flows between the gate G and the drain D or source S. On the other hand, when a power source voltage of a high level that the transistor T may not endure is applied to a gate G, the gate oxide of the transistor T is destroyed and the gate G and the drain D-source S is shorted and the e-fuse operates as a resistor R. Therefore, current comes to flow between the gate G and the drain D-source S.
The data of the e-fuse is recognized from the resistance between the gate G and the drain D-source S of the e-fuse based on the above-described phenomenon. In detecting the data of the e-fuse, (1) the data may be directly recognized without performing an additional sensing operation by using a large size of the transistor T or (2) the data of the e-fuse may be recognized by using an amplifier to sense the current flowing through the transistor T instead of reducing the size of the transistor T. In using either method, substantial space is used in that the size of the transistor T used for the e-fuse is to be large or an amplifier for amplifying the data for each e-fuse is to be used.
Due to the large space used in implementing methods, it is not easy to apply the e-fuse to the row fuse circuit 140 and the column fuse circuit 160 shown in FIG. 1. To address such features, U.S. Pat. Nos. 6,904,751, 6,777,757, 6,667,902, 7,173,851, and 7,269,047 discloses a method of forming e-fuses in the form of an array and performing a repair operation by using the data stored in the e-fuse array. When the e-fuses are formed as an array, the total area may be reduced because amplifiers may be shared by the e-fuses